ELECTRONICS 2 (9 credits)
Bachelor Degree in Electronic Engineering - 3rd year
2nd semester, academic year 2020/21

Prof. Roberto Macaluso

 Lesson Plan

The course represents the first teaching of Digital Electronics offered by the Bachelor’s degree program in Electronics Engineering and aims to provide the students with a broad basic preparation in the analysis and design of digital electronic systems. Alongside theoretical lessons, a series of digital electronic systems design exercises which make use of data sheets of commercial integrated circuits (both in the bipolar and CMOS technology) will be proposed. This will allow students to master the methodologies for the design of digital electronic systems. Moreover, a brief introduction to the microfabrication technologies that are at the basis for the fabrication of integrated circuits will be also provided. The latter will be deepened and extended towards nanotechnologies in the Master’s degree program in Electronics Engineering. The course requires knowledge of the contents of the courses of Electronic devices, logic circuits and Electronics 1.

Course Content and Structure
The course will cover the following content in 72 hours:
Introduction to digital electronics
Difference between analog and digital electronics. Monolithic integration: the evolution of microelectronics. Discrete and integrated circuits. Hybrid circuits. MOSFET and CMOS manufacturing process flow and related technologies. Downscaling of MOSFET devices: the Moore’s law. Design of digital integrated circuits: different levels of abstraction.
Digital systems
Definitions of logic levels. Noise in logical systems. Noise immunity. Noise margins. Signal regeneration. Basic logic gates. Dynamic characteristics of the logic gates. Propagation delay. Fan-in and fan-out.
Switching operations of the bipolar transistor (BJT)
Saturation and cutoff regions. Storage time. Saturating and non-saturating logic. Circuits for non-saturating switching operations. Schottky transistor. Applications of the BJT as a switch: driving a low-power relay, driving a speaker, driving an LED.
Switching operations of MOSFET and CMOS
Enhancement and depletion MOSFETs. Triode, pinch-off, and cut-off regions. The MOSFET as a switch: RON and ROFF. Applications: analog switch. Data sheets of commercial integrated devices. CMOS as a switch. Pass transistor n and p. Strong and weak levels. CMOS transmission gate.
The digital logic inverter in CMOS technology
Transfer characteristic, logic threshold, noise margins, propagation delay, static and dynamic power dissipation, delay-power product, fan-out and interconnection problems. Design based on physical parameters. Output stages separators (buffer).
Logic gates in CMOS technology
NAND and NOR gates in CMOS technology. Multiple input CMOS gates. Comparison as a function of the physical parameters: problems of area occupation. A method for synthesizing logic functions implemented in CMOS logic: pull-up and pull-down networks. Integrated CMOS logic families: HC, HCT, AC, ACT, AHC, AHCT, ACQ, ACTQ, LV, LVC, ALVC. Data sheets of commercial CMOS integrated logic gates.
Other main logic families
Historical evolution of logical families: DL, RTL, DTL, TTL, S-TTL, LS-TTL, AS-TTL, ALS-TTL, F-TTL. Logic gates description. Totem-pole output stage. Open collector and three-state: properties and applications. Wired AND. Data sheets of commercial digital integrated devices.
BiCMOS family
Properties and advantages over CMOS and TTL families. Logic gates description.
Hint on other logic families
ECL, GaAs technology.
Compatibility and comparison of logic families
Interface circuits.
Combinational circuits
Digital decoders: decoder in n-MOS technology, BCD-7 segments decoder. 7 segment and LCD displays. Digital encoders: diode matrix encoder, encoder in bipolar technology, priority encoder. Multiplexer/demultiplexer: examples and applications.
Sequential circuits
SR latch with NAND gates in CMOS technology. CMOS SR Flip-Flop (FF), CMOS SR FF with pass transistors. JK, T, and D FF. Data sheets of CMOS and TTL commercial digital integrated devices. Application of SR latch: anti-bounce circuit.
Shift registers
S-S, S-P, P-S, P-P registers. Universal register. Data sheets of CMOS and TTL commercial digital integrated devices.
Counter circuits
Asynchronous binary counters: frequency divider. Synchronous Counters. Decade counter in BCD code. Ring counters. Up-down counters. Data sheets of commercial digital integrated devices.
Multivibrator circuits
Astable multivibrator with CMOS gates. Controlled astable multivibrator. Ring oscillator. Monostable circuits: monostable with CMOS gates. Integrated monostable. LMC555. Applications of the Schmitt trigger. NAND Schmitt trigger. CMOS 555 timer integrated circuits (monostable and astable).
Analog-to-digital and digital-to-analog conversion
Quantization error. Examples of application of the A/D conversion. Structure and properties of a sample and hold circuit. D/A converters with weighted ladder network, and with R-2R ladder network. A/D converters: flash, with forward-backward counter, successive approximation. Data sheets of commercial digital integrated devices.
Design exercises.

Teaching material:
- Adel S. Sedra, Kenneth C. Smith: Microelectronic circuits, 4th (or following) Ed.
- Jan M. Rabaey, A. Chandrakasan, B. Nikolic: Digital integrated circuits, 2nd Ed., Pearson, 2003.
- Projected slides provided by the lecturer.
- Data sheets and application notes of commercial devices of the leading manufacturers.

The evaluation will be based on a written exam, which will include, in addition to the design of a digital electronics system, also two questions on the main topics of the course. The written test tends to verify that the student has adequate design skills, is able to propose original solutions to real problems, taking into account also the tolerances of the used components and the costs, is able to correlate the various contents of the course independently, includes the applications or the implications of the various contents dealt with in the discipline, has acquired adequate language properties, especially with reference to technical English terminology. Each question of the written exam will be given a maximum score, indicated on the text of the test itself. The mark of the written exam will be given in thirtieths, for a maximum of 30/30, given by the sum of the scores assigned to each question. The assignment of scores will depend on the number and severity of any present errors, as well as on the lack of covered topics. Bonuses may be added to the overall score which will contribute to the formation of the final mark: 1) "presentation" bonus (max 1 point), given to the works presented in an excellent way from a formal point of view and exhibited with excellent properties of language and fluidity of analytical and technical treatment. 2) "originality" bonus (max 2 points), depending on the originality of the design solutions given. The assessment will fail if the examinee will not show an acceptable knowledge of the contents of the topics covered during the course and cannot provide any reasonable solution to the assigned problems. Furthermore, the exam will fail if the student did not deliberately study certain topics of the course.

 Teaching Material

 Class organisation (Scheda di trasparenza)

 Exams calendar

Communications to the students

University of Palermo  -  Department of Energy, Information engineering and Mathematical models (DEIM)
viale delle Scienze, Building 9  -  I-90128  Palermo (Italy)